Publications
All papers, preprints, and research output.
- PLDI'26 A Formally Verified Foundation for Compositional Heterogeneous Coherence
@article{zhang_pldi26, author = {An Qi Zhang and Andr{\'{e}}s Goens and Daniel J. Sorin and Vijay Nagarajan}, title = {A Formally Verified Foundation for Compositional Heterogeneous Coherence}, journal = {Proc. {ACM} Program. Lang.}, number = {{PLDI}}, year = {2026}, } - POPL'26 Towards Pen-and-Paper-Style Equational Reasoning in Interactive Theorem Provers by Equality Saturation
@article{rossel_popl26, author = {Marcus Rossel and Rudi Schneider and Thomas Koehler and Michel Steuwer and Andr{\'{e}}s Goens}, title = {Towards Pen-and-Paper-Style Equational Reasoning in Interactive Theorem Provers by Equality Saturation}, journal = {Proc. {ACM} Program. Lang.}, volume = {10}, number = {{POPL}}, pages = {718--747}, year = {2026}, url = {https://doi.org/10.1145/3776667}, doi = {10.1145/3776667}, timestamp = {Sun, 01 Feb 2026 00:00:00 +0100}, } - CAL'25 Efficient Deadlock Avoidance by Considering Stalling, Message Dependencies, and Topology
@article{srivastava_cal25, author = {Sanya Srivastava and Fletch Rydell and Andr{\'{e}}s Goens and Vijay Nagarajan and Daniel J. Sorin}, title = {Efficient Deadlock Avoidance by Considering Stalling, Message Dependencies, and Topology}, journal = {{IEEE} Comput. Archit. Lett.}, volume = {24}, number = {2}, pages = {305--308}, year = {2025}, url = {https://doi.org/10.1109/LCA.2025.3618627}, doi = {10.1109/LCA.2025.3618627}, timestamp = {Sun, 16 Nov 2025 00:00:00 +0100}, } - PLDI'25 Slotted E-Graphs: First-Class Support for (Bound) Variables in E-Graphs
@article{schneider_pldi25, author = {Rudi Schneider and Marcus Rossel and Amir Shaikhha and Andr{\'{e}}s Goens and Thomas Koehler and Michel Steuwer}, title = {Slotted E-Graphs: First-Class Support for (Bound) Variables in E-Graphs}, journal = {Proc. {ACM} Program. Lang.}, volume = {9}, number = {{PLDI}}, pages = {1888--1910}, year = {2025}, url = {https://doi.org/10.1145/3729326}, doi = {10.1145/3729326}, timestamp = {Thu, 11 Sep 2025 01:00:00 +0200}, } - ARXIV'25 The Equational Theories Project: Advancing Collaborative Mathematical Research at Scale
@article{bolan_arxiv25, author = {Matthew Bolan and Joachim Breitner and Jose Brox and Nicholas Carlini and Mario Carneiro and Floris van Doorn and Martin Dvorak and Andr{\'{e}}s Goens and Aaron Hill and Harald Husum and Hern{\'{a}}n Ibarra Mejia and Zoltan A. Kocsis and Bruno Le Floch and Amir Livne Bar{-}on and Lorenzo Luccioli and Douglas McNeil and Alex Meiburg and Pietro Monticone and Pace P. Nielsen and Emmanuel Osalotioman Osazuwa and Giovanni Paolini and Marco Petracci and Bernhard Reinke and David Renshaw and Marcus Rossel and Cody Roux and J{\'{e}}r{\'{e}}my Scanvic and Shreyas Srinivas and Anand Rao Tadipatri and Terence Tao and Vlad Tsyrklevich and Fernando Vaquerizo{-}Villar and Daniel Weber and Fan Zheng}, title = {The Equational Theories Project: Advancing Collaborative Mathematical Research at Scale}, journal = {CoRR}, volume = {abs/2512.07087}, year = {2025}, url = {https://doi.org/10.48550/arXiv.2512.07087}, doi = {10.48550/ARXIV.2512.07087}, eprinttype = {arXiv}, eprint = {2512.07087}, timestamp = {Sun, 01 Feb 2026 00:00:00 +0100}, } - EGRAPHS'24 Bridging Syntax and Semantics of Lean Expressions in E-Graphs
@inproceedings{rossel_egraphs24, author = {Marcus Rossel and Andr{\'{e}}s Goens}, title = {Bridging Syntax and Semantics of Lean Expressions in E-Graphs}, booktitle = {Proceedings of the 3rd Workshop on E-Graphs and Equality Saturation (EGRAPHS 2024)}, year = {2024}, url = {https://doi.org/10.48550/arXiv.2405.10188}, doi = {10.48550/ARXIV.2405.10188}, note = {arXiv preprint arXiv:2405.10188}, eprinttype = {arXiv}, eprint = {2405.10188}, } - ISCA'24 Determining the Minimum Number of Virtual Networks for Different Coherence Protocols
@inproceedings{li_isca24, author = {Weihang Li and Andr{\'{e}}s Goens and Nicolai Oswald and Vijay Nagarajan and Daniel J. Sorin}, title = {Determining the Minimum Number of Virtual Networks for Different Coherence Protocols}, booktitle = {51st {ACM/IEEE} Annual International Symposium on Computer Architecture, {ISCA} 2024, Buenos Aires, Argentina, June 29 - July 3, 2024}, pages = {182--197}, publisher = {{IEEE}}, year = {2024}, url = {https://doi.org/10.1109/ISCA59077.2024.00023}, doi = {10.1109/ISCA59077.2024.00023}, timestamp = {Fri, 16 Aug 2024 20:48:15 +0200}, } - POPL'24 Guided Equality Saturation
@article{koehler_popl24, author = {Thomas Koehler and Andr{\'{e}}s Goens and Siddharth Bhat and Tobias Grosser and Phil Trinder and Michel Steuwer}, title = {Guided Equality Saturation}, journal = {Proc. {ACM} Program. Lang.}, volume = {8}, number = {{POPL}}, pages = {1727--1758}, year = {2024}, url = {https://doi.org/10.1145/3632900}, doi = {10.1145/3632900}, timestamp = {Thu, 29 Feb 2024 00:00:00 +0100}, } - PACT'24 PipeGen: Automated Transformation of a Single-Core Pipeline into a Multicore Pipeline for a Given Memory Consistency Model
@inproceedings{zhang_pact24, author = {An Qi Zhang and Andr{\'{e}}s Goens and Nicolai Oswald and Tobias Grosser and Daniel J. Sorin and Vijay Nagarajan}, title = {PipeGen: Automated Transformation of a Single-Core Pipeline into a Multicore Pipeline for a Given Memory Consistency Model}, booktitle = {Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, {PACT} 2024, Long Beach, CA, USA, October 14-16, 2024}, pages = {1--13}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3656019.3676889}, doi = {10.1145/3656019.3676889}, timestamp = {Sun, 19 Jan 2025 00:00:00 +0100}, } - CICM'24 Transforming Optimization Problems into Disciplined Convex Programming Form
@inproceedings{fernandez_mir_cicm24, author = {Ramon Fern{\'{a}}ndez Mir and Paul B. Jackson and Siddharth Bhat and Andr{\'{e}}s Goens and Tobias Grosser}, editor = {Andrea Kohlhase and Laura Kov{\'{a}}cs}, title = {Transforming Optimization Problems into Disciplined Convex Programming Form}, booktitle = {Intelligent Computer Mathematics - 17th International Conference, {CICM} 2024, Montr{\'{e}}al, QC, Canada, August 5-9, 2024, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {14960}, pages = {183--202}, publisher = {Springer}, year = {2024}, url = {https://doi.org/10.1007/978-3-031-66997-2\_11}, doi = {10.1007/978-3-031-66997-2\_11}, timestamp = {Fri, 20 Sep 2024 01:00:00 +0200}, } - ITP'24 Verifying Peephole Rewriting in SSA Compiler IRs
@inproceedings{bhat_itp24, author = {Siddharth Bhat and Alex C. Keizer and Chris Hughes and Andr{\'{e}}s Goens and Tobias Grosser}, editor = {Yves Bertot and Temur Kutsia and Michael Norrish}, title = {Verifying Peephole Rewriting in {SSA} Compiler IRs}, booktitle = {15th International Conference on Interactive Theorem Proving, {ITP} 2024, Tbilisi, Georgia, September 9-14, 2024}, series = {LIPIcs}, volume = {309}, pages = {9:1--9:20}, publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik}, year = {2024}, url = {https://doi.org/10.4230/LIPIcs.ITP.2024.9}, doi = {10.4230/LIPICS.ITP.2024.9}, timestamp = {Fri, 21 Nov 2025 23:44:11 +0100}, } - PLDI'23 Compound Memory Models
@article{goens_pldi23, author = {Andr{\'{e}}s Goens and Soham Chakraborty and Susmit Sarkar and Sukarn Agarwal and Nicolai Oswald and Vijay Nagarajan}, title = {Compound Memory Models}, journal = {Proc. {ACM} Program. Lang.}, volume = {7}, number = {{PLDI}}, pages = {1145--1168}, year = {2023}, url = {https://doi.org/10.1145/3591267}, doi = {10.1145/3591267}, timestamp = {Sun, 19 Jan 2025 00:00:00 +0100}, } - VSTTE'23 Provable Determinism for Software in Cyber-Physical Systems
@inproceedings{rossel_vstte23, author = {Marcus Rossel and Shaokai Lin and Marten Lohstroh and Jer{\'{o}}nimo Castrill{\'{o}}n and Andr{\'{e}}s Goens}, editor = {Andrew Reynolds and Serdar Tasiran}, title = {Provable Determinism for Software in Cyber-Physical Systems}, booktitle = {Verified Software. Theories, Tools and Experiments - 15th International Conference, {VSTTE} 2023, Ames, IA, USA, October 23-24, 2023, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {14095}, pages = {85--107}, publisher = {Springer}, year = {2023}, url = {https://doi.org/10.1007/978-3-031-66064-1\_6}, doi = {10.1007/978-3-031-66064-1\_6}, timestamp = {Sun, 06 Oct 2024 01:00:00 +0200}, } - TCAD'22 mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies
@article{goens_tcad22, author = {Andr{\'{e}}s Goens and Timo Nicolai and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {41}, number = {6}, pages = {1592--1605}, year = {2022}, url = {https://doi.org/10.1109/TCAD.2021.3102512}, doi = {10.1109/TCAD.2021.3102512}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, } - CASES'21 Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks
@article{khasanov_cases21, author = {Robert Khasanov and Julian Robledo and Christian Menard and Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks}, journal = {{ACM} Trans. Embed. Comput. Syst.}, volume = {20}, number = {5s}, pages = {60:1--60:26}, year = {2021}, url = {https://doi.org/10.1145/3476991}, doi = {10.1145/3476991}, abstract = {Advancing telecommunication standards continuously push for larger bandwidths, lower latencies, and faster data rates. The receiver baseband unit not only has to deal with a huge number of users expecting connectivity but also with a high workload heterogeneity. As a consequence of the required flexibility, baseband processing has seen a trend towards software implementations in cloud Radio Access Networks (cRANs). The flexibility gained from software implementation comes at the price of impoverished energy efficiency. This paper addresses the trade-off between flexibility and efficiency by proposing a domain-specific hybrid mapping algorithm. Hybrid mapping is an established approach from the model-based design of embedded systems that allows us to retain flexibility while targeting heterogeneous hardware. Depending on the current workload, the runtime system selects the most energy-efficient mapping configuration without violating timing constraints. We leverage the structure of baseband processing, and refine the scheduling methodology, to enable efficient mapping of 100s of tasks at the millisecond granularity, improving upon state-of-the-art hybrid approaches. We validate our approach on an Odroid XU4 and virtual platforms with application-specific accelerators on an open-source prototype. On different LTE workloads, our hybrid approach shows significant improvements both at design time and at runtime. At design-time, mappings of similar quality to those obtained by state-of-the-art methods are generated around four orders of magnitude faster. At runtime, multi-application schedules are computed 37.7\% faster than the state-of-the-art without compromising on the quality.}, timestamp = {Thu, 01 May 2025 01:00:00 +0200}, } - SAMOS'21 Embeddings of Task Mappings to Multicore Systems
@inproceedings{goens_samos21, author = {Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Alex Orailoglu and Matthias Jung and Marc Reichenbach}, title = {Embeddings of Task Mappings to Multicore Systems}, booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation - 21st International Conference, {SAMOS} 2021, Virtual Event, July 4-8, 2021, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {13227}, pages = {161--176}, publisher = {Springer}, year = {2021}, url = {https://doi.org/10.1007/978-3-031-04580-6\_11}, doi = {10.1007/978-3-031-04580-6\_11}, timestamp = {Fri, 29 Apr 2022 14:50:40 +0200}, } - PHDTHESIS'21 Improving Model-Based Software Synthesis: A Focus on Mathematical Structures
@phdthesis{goens_phdthesis21, author = {Andrés Goens}, title = {Improving Model-Based Software Synthesis: {A} Focus on Mathematical Structures}, school = {Dresden University of Technology, Germany}, year = {2021}, url = {https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa2-748845}, urn = {urn:nbn:de:bsz:14-qucosa2-748845}, timestamp = {Sat, 17 Jul 2021 01:00:00 +0200}, } - RAPIDO'21 Mocasin - Rapid Prototyping of Rapid Prototyping Tools: A Framework for Exploring New Approaches in Mapping Software to Heterogeneous Multi-cores
@inproceedings{menard_rapido21, author = {Christian Menard and Andr{\'{e}}s Goens and Gerald Hempel and Robert Khasanov and Julian Robledo and Felix Teweleitt and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {Mocasin - Rapid Prototyping of Rapid Prototyping Tools: {A} Framework for Exploring New Approaches in Mapping Software to Heterogeneous Multi-cores}, booktitle = {DroneSE and {RAPIDO} '21: Methods and Tools, Budapest, Hungary, January 18, 2021}, pages = {66--73}, publisher = {{ACM}}, year = {2021}, url = {https://doi.org/10.1145/3444950.3447285}, doi = {10.1145/3444950.3447285}, timestamp = {Thu, 01 May 2025 01:00:00 +0200}, } - PACT'21 PolyGym: Polyhedral Optimizations as an Environment for Reinforcement Learning
@inproceedings{brauckmann_pact21, author = {Alexander Brauckmann and Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Jaejin Lee and Albert Cohen}, title = {PolyGym: Polyhedral Optimizations as an Environment for Reinforcement Learning}, booktitle = {30th International Conference on Parallel Architectures and Compilation Techniques, {PACT} 2021, Atlanta, GA, USA, September 26-29, 2021}, pages = {17--29}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/PACT52795.2021.00009}, doi = {10.1109/PACT52795.2021.00009}, abstract = {The problem of finding good mappings is central to designing and executing applications efficiently in embedded systems. In heterogeneous multicores, which are ubiquitous today, this problem yields an intractably large design space of possible mappings. Most methods explore this space using heuristics, many of which implicitly use geometric notions in mappings. In this paper we explore the geometry of the mapping problem explicitly, for finding embeddings of the mapping space that capture its structure. This allows us to formulate new mapping strategies by leveraging the geometry of the mapping space, as well as improving existing heuristics that do so implicitly. We evaluate our approach on a novel mapping heuristic based on gradient descent, as well as multiple existing meta-heuristics. For complex architectures, our methods improved the results of established exploration meta-heuristics by about an order of magnitude in average.}, timestamp = {Mon, 06 Nov 2023 15:27:23 +0100}, } - DATE'20 Achieving Determinism in Adaptive AUTOSAR
@inproceedings{menard_date20, author = {Christian Menard and Andr{\'{e}}s Goens and Marten Lohstroh and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {Achieving Determinism in Adaptive {AUTOSAR}}, booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020}, pages = {822--827}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.23919/DATE48585.2020.9116430}, doi = {10.23919/DATE48585.2020.9116430}, timestamp = {Mon, 30 Sep 2024 15:20:52 +0200}, } - CC'20 Compiler-based graph representations for deep learning models of code
@inproceedings{brauckmann_cc20, author = {Alexander Brauckmann and Andr{\'{e}}s Goens and Sebastian Ertel and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Louis{-}No{\"{e}}l Pouchet and Alexandra Jimborean}, title = {Compiler-based graph representations for deep learning models of code}, booktitle = {{CC} '20: 29th International Conference on Compiler Construction, San Diego, CA, USA, February 22-23, 2020}, pages = {201--211}, publisher = {{ACM}}, year = {2020}, url = {https://doi.org/10.1145/3377555.3377894}, doi = {10.1145/3377555.3377894}, timestamp = {Sun, 19 Jan 2025 00:00:00 +0100}, } - FDL'20 ComPy-Learn: A toolbox for exploring machine learning representations for compilers
@inproceedings{brauckmann_fdl20, author = {Alexander Brauckmann and Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {ComPy-Learn: {A} toolbox for exploring machine learning representations for compilers}, booktitle = {Forum for Specification and Design Languages, {FDL} 2020, Kiel, Germany, September 15-17, 2020}, pages = {1--4}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/FDL50818.2020.9232946}, doi = {10.1109/FDL50818.2020.9232946}, timestamp = {Tue, 10 Nov 2020 11:14:51 +0100}, } - DATE'20 Generalized Data Placement Strategies for Racetrack Memories
@inproceedings{khan_date20, author = {Asif Ali Khan and Andr{\'{e}}s Goens and Fazal Hameed and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {Generalized Data Placement Strategies for Racetrack Memories}, booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020}, pages = {1502--1507}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.23919/DATE48585.2020.9116245}, doi = {10.23919/DATE48585.2020.9116245}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, } - ICT'20 Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach
@inproceedings{wittig_ict20, author = {Robert Wittig and Andr{\'{e}}s Goens and Christian Menard and Emil Mat{\'{u}}s and Gerhard P. Fettweis and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach}, booktitle = {27th International Conference on Telecommunications, {ICT} 2020, Bali, Indonesia, October 5-7, 2020}, pages = {1--5}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ICT49546.2020.9239539}, doi = {10.1109/ICT49546.2020.9239539}, timestamp = {Thu, 12 Nov 2020 09:29:19 +0100}, } - MAPL'19 A case study on machine learning for synthesizing benchmarks
@inproceedings{goens_mapl19, author = {Andr{\'{e}}s Goens and Alexander Brauckmann and Sebastian Ertel and Chris Cummins and Hugh Leather and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Tim Mattson and Abdullah Muzahid and Armando Solar{-}Lezama}, title = {A case study on machine learning for synthesizing benchmarks}, booktitle = {Proceedings of the 3rd {ACM} {SIGPLAN} International Workshop on Machine Learning and Programming Languages, MAPL@PLDI 2019, Phoenix, AZ, USA, June 22, 2019}, pages = {38--46}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3315508.3329976}, doi = {10.1145/3315508.3329976}, timestamp = {Thu, 14 Oct 2021 09:58:35 +0200}, } - DAC'19 Actors Revisited for Time-Critical Systems
@inproceedings{lohstroh_dac19, author = {Marten Lohstroh and Martin Schoeberl and Andr{\'{e}}s Goens and Armin Wasicek and Christopher D. Gill and Marjan Sirjani and Edward A. Lee}, title = {Actors Revisited for Time-Critical Systems}, booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019, {DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019}, pages = {152}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3316781.3323469}, doi = {10.1145/3316781.3323469}, timestamp = {Sun, 19 Jan 2025 00:00:00 +0100}, } - SAMOS'19 On Compact Mappings for Multicore Systems
@inproceedings{goens_samos19, author = {Andr{\'{e}}s Goens and Christian Menard and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Dionisios N. Pnevmatikatos and Maxime Pelcat and Matthias Jung}, title = {On Compact Mappings for Multicore Systems}, booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, {SAMOS} 2019, Samos, Greece, July 7-11, 2019, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {11733}, pages = {325--335}, publisher = {Springer}, year = {2019}, url = {https://doi.org/10.1007/978-3-030-27562-4\_23}, doi = {10.1007/978-3-030-27562-4\_23}, timestamp = {Wed, 21 Aug 2019 01:00:00 +0200}, } - CYPHY'19 Reactors: A Deterministic Model for Composable Reactive Systems
@inproceedings{lohstroh_cyphy19, author = {Marten Lohstroh and {\'{I}}{\~{n}}igo {\'{I}}ncer Romeo and Andr{\'{e}}s Goens and Patricia Derler and Jer{\'{o}}nimo Castrill{\'{o}}n and Edward A. Lee and Alberto L. Sangiovanni{-}Vincentelli}, editor = {Roger D. Chamberlain and Martin Edin Grimheden and Walid Taha}, title = {Reactors: {A} Deterministic Model for Composable Reactive Systems}, booktitle = {Cyber Physical Systems. Model-Based Design - 9th International Workshop, CyPhy 2019, and 15th International Workshop, {WESE} 2019, New York City, NY, USA, October 17-18, 2019, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {11971}, pages = {59--85}, publisher = {Springer}, year = {2019}, url = {https://doi.org/10.1007/978-3-030-41131-2\_4}, doi = {10.1007/978-3-030-41131-2\_4}, timestamp = {Sun, 04 Aug 2024 01:00:00 +0200}, } - HASKELL'19 STCLang: state thread composition as a foundation for monadic dataflow parallelism
@inproceedings{ertel_haskell19, author = {Sebastian Ertel and Justus Adam and Norman A. Rink and Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Richard A. Eisenberg}, title = {STCLang: state thread composition as a foundation for monadic dataflow parallelism}, booktitle = {Proceedings of the 12th {ACM} {SIGPLAN} International Symposium on Haskell, Haskell@ICFP 2019, Berlin, Germany, August 18-23, 2019}, pages = {146--161}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3331545.3342600}, doi = {10.1145/3331545.3342600}, timestamp = {Sun, 19 Jan 2025 00:00:00 +0100}, } - TMSCS'18 A Hardware/Software Stack for Heterogeneous Systems
@article{castrillon_tmscs18, author = {Jer{\'{o}}nimo Castrill{\'{o}}n and Matthias Lieber and Sascha Kl{\"{u}}ppelholz and Marcus V{\"{o}}lp and Nils Asmussen and Uwe A{\ss}mann and Franz Baader and Christel Baier and Gerhard P. Fettweis and Jochen Fr{\"{o}}hlich and Andr{\'{e}}s Goens and Sebastian Haas and Dirk Habich and Hermann H{\"{a}}rtig and Mattis Hasler and Immo Huismann and Tomas Karnagel and Sven Karol and Akash Kumar and Wolfgang Lehner and Linda Leuschner and Siqi Ling and Steffen M{\"{a}}rcker and Christian Menard and Johannes Mey and Wolfgang E. Nagel and Benedikt N{\"{o}}then and Rafael Pe{\~{n}}aloza and Michael Raitza and J{\"{o}}rg Stiller and Annett Ungeth{\"{u}}m and Axel Voigt and Sascha Wunderlich}, title = {A Hardware/Software Stack for Heterogeneous Systems}, journal = {{IEEE} Trans. Multi Scale Comput. Syst.}, volume = {4}, number = {3}, pages = {243--259}, year = {2018}, url = {https://doi.org/10.1109/TMSCS.2017.2771750}, doi = {10.1109/TMSCS.2017.2771750}, timestamp = {Thu, 25 Dec 2025 00:00:00 +0100}, } - CC'18 Compiling for concise code and efficient I/O
@inproceedings{ertel_cc18, author = {Sebastian Ertel and Andr{\'{e}}s Goens and Justus Adam and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Christophe Dubach and Jingling Xue}, title = {Compiling for concise code and efficient {I/O}}, booktitle = {Proceedings of the 27th International Conference on Compiler Construction, {CC} 2018, February 24-25, 2018, Vienna, Austria}, pages = {104--115}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3178372.3179505}, doi = {10.1145/3178372.3179505}, timestamp = {Sun, 19 Jan 2025 00:00:00 +0100}, } - PARMA'18 Implicit Data-Parallelism in Kahn Process Networks: Bridging the MacQueen Gap
@inproceedings{khasanov_parma18, author = {Robert Khasanov and Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {Implicit Data-Parallelism in Kahn Process Networks: Bridging the MacQueen Gap}, booktitle = {Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM@HiPEAC 2018, Manchester, United Kingdom, January 23-23, 2018}, pages = {20--25}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3183767.3183790}, doi = {10.1145/3183767.3183790}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, } - MULTIPROG'18 Level Graphs: Generating Benchmarks for Concurrency Optimizations in Compilers
@InProceedings{goens_multiprog18, author = {Andr{\'e}s Goens and Sebastian Ertel and Justus Adam and Jeronimo Castrillon}, title = {Level Graphs: Generating Benchmarks for Concurrency Optimizations in Compilers}, booktitle = {Proceedings of the 11th International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG'2018), co-located with 13th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC)}, year = {2018}, url = {http://research.ac.upc.edu/multiprog/multiprog2018/papers/MULTIPROG-2018_Goens.pdf}, month = jan, location = {Manchester, United Kingdom} } - MCSOC'18 On the Representation of Mappings to Multicores
@inproceedings{goens_mcsoc18, author = {Andr{\'{e}}s Goens and Christian Menard and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {On the Representation of Mappings to Multicores}, booktitle = {12th {IEEE} International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2018, Hanoi, Vietnam, September 12-14, 2018}, pages = {184--191}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/MCSoC2018.2018.00039}, doi = {10.1109/MCSOC2018.2018.00039}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, } - SCOPES'17 Robust Mapping of Process Networks to Many-Core Systems using Bio-Inspired Design Centering
@inproceedings{hempel_scopes17, author = {Gerald Hempel and Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n and Josefine Asmus and Ivo F. Sbalzarini}, editor = {Sander Stuijk}, title = {Robust Mapping of Process Networks to Many-Core Systems using Bio-Inspired Design Centering}, booktitle = {Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, {SCOPES} 2017, Sankt Goar, Germany, June 12-13, 2017}, pages = {21--30}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3078659.3078667}, doi = {10.1145/3078659.3078667}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, } - TACO'17 Symmetry in Software Synthesis
@article{goens_taco17, author = {Andr{\'{e}}s Goens and Sergio Siccha and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {Symmetry in Software Synthesis}, journal = {{ACM} Trans. Archit. Code Optim.}, volume = {14}, number = {2}, pages = {20:1--20:26}, year = {2017}, url = {https://doi.org/10.1145/3095747}, doi = {10.1145/3095747}, timestamp = {Wed, 17 Feb 2021 00:00:00 +0100}, } - SCOPES'17 TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings
@inproceedings{goens_scopes17, author = {Andr{\'{e}}s Goens and Robert Khasanov and Jer{\'{o}}nimo Castrill{\'{o}}n and Marcus H{\"{a}}hnel and Till Smejkal and Hermann H{\"{a}}rtig}, editor = {Sander Stuijk}, title = {TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings}, booktitle = {Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, {SCOPES} 2017, Sankt Goar, Germany, June 12-13, 2017}, pages = {11--20}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3078659.3078663}, doi = {10.1145/3078659.3078663}, timestamp = {Tue, 05 Aug 2025 01:00:00 +0200}, } - JSA'16 An optimal allocation of memory buffers for complex multicore platforms
@article{goens_jsa16, author = {Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n and Maximilian Odendahl and Rainer Leupers}, title = {An optimal allocation of memory buffers for complex multicore platforms}, journal = {J. Syst. Archit.}, volume = {66-67}, pages = {69--83}, year = {2016}, url = {https://doi.org/10.1016/j.sysarc.2016.05.002}, doi = {10.1016/J.SYSARC.2016.05.002}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, } - NORCAS'16 High-level NoC model for MPSoC compilers
@inproceedings{menard_norcas16, author = {Christian Menard and Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, title = {High-level NoC model for MPSoC compilers}, booktitle = {{IEEE} Nordic Circuits and Systems Conference, {NORCAS} 2016, Copenhagen, Denmark, November 1-2, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/NORCHIP.2016.7792876}, doi = {10.1109/NORCHIP.2016.7792876}, timestamp = {Wed, 16 Oct 2019 14:14:56 +0200}, } - MCSOC'16 Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study
@inproceedings{goens_mcsoc16, author = {Andr{\'{e}}s Goens and Robert Khasanov and Jer{\'{o}}nimo Castrill{\'{o}}n and Simon Polstra and Andy D. Pimentel}, title = {Why Comparing System-Level MPSoC Mapping Approaches is Difficult: {A} Case Study}, booktitle = {10th {IEEE} International Symposium on Embedded Multicore/Many-core Systems-on-Chip, {MCSOC} 2016, Lyon, France, September 21-23, 2016}, pages = {281--288}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/MCSoC.2016.48}, doi = {10.1109/MCSOC.2016.48}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, } - IESS'15 Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCs
@inproceedings{goens_iess15, author = {Andr{\'{e}}s Goens and Jer{\'{o}}nimo Castrill{\'{o}}n}, editor = {Marcelo G{\"{o}}tz and Gunar Schirner and Marco Aur{\'{e}}lio Wehrmeister and Mohammad Abdullah Al Faruque and Achim Rettberg}, title = {Analysis of Process Traces for Mapping Dynamic {KPN} Applications to MPSoCs}, booktitle = {System Level Design from {HW/SW} to Memory for Embedded Systems - 5th {IFIP} {TC} 10 International Embedded Systems Symposium, {IESS} 2015, Foz do Igua{\c{c}}u, Brazil, November 3-6, 2015, Proceedings}, series = {{IFIP} Advances in Information and Communication Technology}, volume = {523}, pages = {116--127}, publisher = {Springer}, year = {2015}, url = {https://doi.org/10.1007/978-3-319-90023-0\_10}, doi = {10.1007/978-3-319-90023-0\_10}, timestamp = {Thu, 23 Jun 2022 19:56:26 +0200}, } - IPDPS'15 Buffer Allocation Based On-Chip Memory Optimization for Many-Core Platforms
@inproceedings{odendahl_ipdps15, author = {Maximilian Odendahl and Andr{\'{e}}s Goens and Rainer Leupers and Gerd Ascheid and Tomas Henriksson}, title = {Buffer Allocation Based On-Chip Memory Optimization for Many-Core Platforms}, booktitle = {2015 {IEEE} International Parallel and Distributed Processing Symposium Workshop, {IPDPS} 2015, Hyderabad, India, May 25-29, 2015}, pages = {1119--1124}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/IPDPSW.2015.67}, doi = {10.1109/IPDPSW.2015.67}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, } - DATE'14 Optimized buffer allocation in multicore platforms
@inproceedings{odendahl_date14, author = {Maximilian Odendahl and Andr{\'{e}}s Goens and Rainer Leupers and Gerd Ascheid and Benjamin Ries and Berthold V{\"{o}}cking and Tomas Henriksson}, editor = {Gerhard P. Fettweis and Wolfgang Nebel}, title = {Optimized buffer allocation in multicore platforms}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2014, Dresden, Germany, March 24-28, 2014}, pages = {1--6}, publisher = {European Design and Automation Association}, year = {2014}, url = {https://doi.org/10.7873/DATE.2014.337}, doi = {10.7873/DATE.2014.337}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, }