PRS Group @ TU Darmstadt - Andrés Goens

Jerónimo Castrillón

Publications

  1. HCA'23 Dataflow Models of Computation for Programming Heterogeneous Multicores

    Jeronimo Castrillon, Karol Desnos, Andrés Goens, Christian Menard

  2. VSTTE'23 Provable Determinism for Software in Cyber-Physical Systems

    Marcus Rossel, Shaokai Lin, Marten Lohstroh, Jerónimo Castrillón, Andrés Goens

  3. TCAD'22 mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies

    Andrés Goens, Timo Nicolai, Jerónimo Castrillón

  4. CASES'21 Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks

    Robert Khasanov, Julian Robledo, Christian Menard, Andrés Goens, Jerónimo Castrillón

  5. SAMOS'21 Embeddings of Task Mappings to Multicore Systems

    Andrés Goens, Jerónimo Castrillón

  6. RAPIDO'21 Mocasin - Rapid Prototyping of Rapid Prototyping Tools: A Framework for Exploring New Approaches in Mapping Software to Heterogeneous Multi-cores

    Christian Menard, Andrés Goens, Gerald Hempel, Robert Khasanov, Julian Robledo, Felix Teweleitt, Jerónimo Castrillón

  7. PACT'21 PolyGym: Polyhedral Optimizations as an Environment for Reinforcement Learning

    Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón

  8. DATE'20 Achieving Determinism in Adaptive AUTOSAR

    Christian Menard, Andrés Goens, Marten Lohstroh, Jerónimo Castrillón

  9. CC'20 Compiler-based graph representations for deep learning models of code

    Alexander Brauckmann, Andrés Goens, Sebastian Ertel, Jerónimo Castrillón

  10. FDL'20 ComPy-Learn: A toolbox for exploring machine learning representations for compilers

    Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón

  11. DATE'20 Generalized Data Placement Strategies for Racetrack Memories

    Asif Ali Khan, Andrés Goens, Fazal Hameed, Jerónimo Castrillón

  12. ICT'20 Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach

    Robert Wittig, Andrés Goens, Christian Menard, Emil Matús, Gerhard P. Fettweis, Jerónimo Castrillón

  13. MAPL'19 A case study on machine learning for synthesizing benchmarks

    Andrés Goens, Alexander Brauckmann, Sebastian Ertel, Chris Cummins, Hugh Leather, Jerónimo Castrillón

  14. SAMOS'19 On Compact Mappings for Multicore Systems

    Andrés Goens, Christian Menard, Jerónimo Castrillón

  15. CYPHY'19 Reactors: A Deterministic Model for Composable Reactive Systems

    Marten Lohstroh, Íñigo Íncer Romeo, Andrés Goens, Patricia Derler, Jerónimo Castrillón, Edward A. Lee, Alberto L. Sangiovanni-Vincentelli

  16. HASKELL'19 STCLang: state thread composition as a foundation for monadic dataflow parallelism

    Sebastian Ertel, Justus Adam, Norman A. Rink, Andrés Goens, Jerónimo Castrillón

  17. TMSCS'18 A Hardware/Software Stack for Heterogeneous Systems

    Jerónimo Castrillón, Matthias Lieber, Sascha Klüppelholz, Marcus Völp, Nils Asmussen, Uwe Aßmann, Franz Baader, Christel Baier, Gerhard P. Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Hermann Härtig, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Akash Kumar, Wolfgang Lehner, Linda Leuschner, Siqi Ling, Steffen Märcker, Christian Menard, Johannes Mey, Wolfgang E. Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, Sascha Wunderlich

  18. CC'18 Compiling for concise code and efficient I/O

    Sebastian Ertel, Andrés Goens, Justus Adam, Jerónimo Castrillón

  19. PARMA'18 Implicit Data-Parallelism in Kahn Process Networks: Bridging the MacQueen Gap

    Robert Khasanov, Andrés Goens, Jerónimo Castrillón

  20. MULTIPROG'18 Level Graphs: Generating Benchmarks for Concurrency Optimizations in Compilers

    Andrés Goens, Sebastian Ertel, Justus Adam, Jeronimo Castrillon

  21. MCSOC'18 On the Representation of Mappings to Multicores

    Andrés Goens, Christian Menard, Jerónimo Castrillón

  22. SCOPES'17 Robust Mapping of Process Networks to Many-Core Systems using Bio-Inspired Design Centering

    Gerald Hempel, Andrés Goens, Jerónimo Castrillón, Josefine Asmus, Ivo F. Sbalzarini

  23. TACO'17 Symmetry in Software Synthesis

    Andrés Goens, Sergio Siccha, Jerónimo Castrillón

  24. SCOPES'17 TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings

    Andrés Goens, Robert Khasanov, Jerónimo Castrillón, Marcus Hähnel, Till Smejkal, Hermann Härtig

  25. JSA'16 An optimal allocation of memory buffers for complex multicore platforms

    Andrés Goens, Jerónimo Castrillón, Maximilian Odendahl, Rainer Leupers

  26. NORCAS'16 High-level NoC model for MPSoC compilers

    Christian Menard, Andrés Goens, Jerónimo Castrillón

  27. MCSOC'16 Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study

    Andrés Goens, Robert Khasanov, Jerónimo Castrillón, Simon Polstra, Andy D. Pimentel

  28. IESS'15 Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCs

    Andrés Goens, Jerónimo Castrillón