Publications

Andrés Goens, Robert Khasanov, Marcus Hähnel, Till Smejkal, Hermann Härtig, Jeronimo Castrillon (2017). TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings. Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES'17).

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Christian Menard, Andrés Goens, Jeronimo Castrillon (2016). High-Level NoC Model for MPSoC Compilers. Proceedings of the IEEE Nordic Circuits and Systems Conference (NORCAS'16).

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Marcus Völp, Sascha Klüppelholz, Jeronimo Castrillon, Hermann Härtig, Nils Asmussen, Uwe Assmann, Franz Baader, Christel Baier, Gerhard Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Wolfgang Lehner, Linda Leuschner, Matthias Lieber, Siqi Ling, Steffen Märcker, Johannes Mey, Wolfgang Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt (2016). The Orchestration Stack: The Impossible Task of Designing Software for Unknown Future Post-CMOS Hardware. Proceedings of the 1st International Workshop on Post-Moore’s Era Supercomputing (PMES), Co-located with The International Conference for High Performance Computing, Networking, Storage and Analysis (SC16).

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Andrés Goens, Robert Khasanov, Jeronimo Castrillon, Simon Polstra, Andy Pimentel (2016). Why Comparing System-level MPSoC Mapping Approaches is Difficult: a Case Study. Proceedings of the IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16).

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Andrés Goens, Jeronimo Castrillon, Maximilian Odendahland Rainer Leupers (2016). An Optimal Allocation of Memory Buffers for Complex Multicore Platforms. Journal of Systems Architecture.

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Andrés Goens, Jeronimo Castrillon (2015). Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCs. System Level Design from HW/SW to Memory for Embedded Systems. IESS 2015. IFIP Advances in Information and Communication Technology, vol 523.

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Maximilian Odendahl, Andrés Goens, Rainer Leupers, Gerd Ascheid, Tomas Henriksson (2015). Buffer allocation based on-chip memory optimization for many-core platforms. 2015 IEEE International Parallel and Distributed Processing Symposium Workshop.

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Maximilian Odendahl, Andrés Goens, Rainer Leupers, Gerd Ascheid, Benjamin Ries, Berthold Vöckingand Tomas Henriksson (2014). Optimized buffer allocation in multicore platforms. Proceedings of the conference on Design, Automation & Test in Europe.

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